Server + - Server+ Q for Beginners ;)

Author

Server+ Q for Beginners ;)

namrak

2002-10-22, 9:57 pm

Here's a simple question for you guys.

Lucky works for Systems Integrators R Us. A client of theirs has just ordered up a dual processor server for their business. This server is to take on web and ftp duties using Red Hat Linux 7.2. The server is to be configured using dual Pentium III 1GHz Xeon processors on a Tyan motherboard (AMI BIOS).

Having assembled all the parts needed for the server, Lucky begins putting in the parts needed to only POST. Keeping in mind preventative ESD measures, he installs both the processors with hsf onto the motherboard and then installs the mobo into the full tower case. He plugs the ATX power connector to the board, installs the agp video card and a single 128MB DIMM. The moment of truth comes and he presses the power on button. The powersupply kicks in, but his ears are greeted with 5 beeps. He reseats all the devices and powers on the server, but gets the same result. He knows the motherboard supports the speed and he set the jumpers properly for the correct settings.

What is the likely culprit here?

A) he did not verify both the processor steppings
B) both processors are corrupt and should be replaced
C) Red Hat Linux never supported dual processors and Windows 98SE must be used
D) the power supply was improperly grounded
E) a BIOS flash to the latest revision is necessary
F) convert the client to SuSE instead of Red Hat

Supertech

2002-10-22, 10:35 pm

AMI BIOS - 5 beeps - processor failure.

There is an underlying expectation that all processors in a multiprocessor system are of the same stepping and will all use the same set of processor-specific patches. In addition, there is a clear expectation that all processors in the system are sourced from the same processor manufacturer, are running at the same speed, and have the same on-chip or in-package cache sizes.

When systems have mixed processor steppings installed, customers are at increased risk for difficulties relating to not having the proper microcode patches available on their systems due to older BIOS. Frequently it is not obvious to the customer that the problem is due to this particular issue, and that BIOS updates may be needed to solve the problem.

It could be A. maybe E will fix him up.

possibly B but not likely.

not C or F cause he never got out of POST.

not D cause if it was power related he wouldn't have gotten this far.

how's that?

azimuth40

2002-10-23, 12:22 am

E.

Answer A could be eliminated by removing one CPU and see what happens. I never would have taken the chance of putting both in before a power test anyway.

Doing the above should give insight into answer B.

If you get to the point in POST to be able to activate the speaker and not need a post card then it is the processors themselves that say that they are bad.

I agree with Supertech on C and F.

Of the answers left only E fits but the best possibility is missing. One of the CPU's is still not correctly seated or has a bent pin of bad socket. One CPU at a time will ferret that answer out also. Bad steppings will generally always pass POST but fail in useage i.e. BSOD type.

namrak

2002-10-24, 3:37 pm

And the one answer I was looking for is (A). The SMP system will encounter issues with the two processors having different steppings especially if the value is large.

However, you would normally receive two processors from the same batch when placing the order for the components of the new server. I just wanted to emphasize a "stepping" answer since I ran into one on the actual test.
A BIOS revision (answer E) could help, but would not necessarily make the system run any better with the different stepped processors.

As for the likelihood of both processors being dead. Not likely, though you could easily check by running each processor by itself on the system like azimuth mentioned. However, in context of the question, this is to be a dual processor system.

azimuth40

2002-10-25, 12:36 am

Makes me question the question that they gave you. According to Intel POST will not normally detect a stepping mismatch. Steppings are bug fixes in microcode.

Microcode is not tested at that depth in POST. Things like cache increase are normally code name changes and we know that those should not be mismatched.

Unless AMI has added code to compare steppings for equality it does not make sense. Flagging it as a CPU failure makes even less sense. An on screen warning of stepping mismatch seems more reasonable.

But what do I know, I doubt that test writers read processor specs to the depth that I do from years of force of habit. I suppose Intel could have added some logic recently to make certain combinations fail during POST rather than waiting for a BSOD.

Tech Ranger

2002-10-28, 7:58 pm

I didn't get a chance to answer, but I would have said "A". The point of the question obviously is to ascertain that you are familiar with the need for stepping consistency when employing SMP.

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